Phase Locked Loop 2.0

surya deopa
980
1
0
0
Frequency Detection and FPGA slot
Open in Editor
Forked from
Phase Locked Loop
Phase Locked Loop

surya deopa

Known forks (0)
We didn't find the known forks. Make the first fork
Tags
The project owner hasn't added any tags yet.

Public Domain /

Published: October 8, 2018 In development

Project Description

Main Project Image
The project owner hasn't added main project image yet.
Project description
The project owner hasn't added a project description yet.
Gallery
The project owner hasn't added any images yet.

Design Files

Embed Code
Component (14)
Qty
Description
SN74HC4040N

U2

1
12-Bit Asynchronous Binary Counter
Capacitor

C2

1
Generic Capacitor (Non-Polarized) (.33u)
CD74HC297

U3

1
No description
4 input jumper

U26

1
No description

Show More

Export Design Data

Open JSON Format
All model data in Upverter's Open JSON export format (more info)
Gerber Format (RS-274X extended)
CAD to CAM transfer instructions (more info)
NC Drill (Excellon)
NC drill and route machine instructions (more info)
XYRS
X-Y, rotation and side data for Pick and Place assembly (CSV)
PADS Layout Netlist
Export your schematic into a third-party layout tool
Dimension Drawing
Export the board outline, holes, and rulers
High-Res Schematic PNG
High resolution image form
3D Model (Step)
3D model of the board and components

Show More